Ch 2.16-2.18 (HP1)

2.16 Real Stuff: ARMv7 (32-bit) Instructions

ARM is a RISC instruction set and similar to MIPS. The principle difference between MIPS and ARM is that MIPS has more registers.

• Addressing Modes
  • Unlike MIPS, ARM does not reserve a register to contain 0
  • 9 addressing modes
    • 
  • Refer to figures 2.32 for a list of possible instructions
• Compare and Conditional Branch
  • MIPS uses contents of registers to evaluate conditional branches
  • ARM uses 4 condition codes
    • negative, zero, carry, overflow
    • Set on any arithmetic or logical instruction
    • Setting CC is optional
  • CMP subtracts one operand from the other and sets condition codes based on the result
  • CMN (Compare negative) adds one operand to the other and sets condition codes based on the result
  • TST performs logical AND on two operands to set all condition codes BUT overflow
  • TEQ uses XOR to setall condition codes BUT overflow
  • Refer to figure 2.34 for instruction formats of ARM and MIPS
• Unique Features of ARM
  • As mentioned above ARM does not have dedicated zero reg therefore it has separate opcodes for the same MIPS functions

    $zero

  • ARM has support for multiword arithmetic
  • ARM has 12 bit immediate field
    • 8 LSB are ZEXTed to 32 bit then rotated right the number of bits specified in the first four bits of the field multiplied by two
    • Allows representation of all powers of two in a 32 bit word
  • Operand shifting is not limited to immediates

2.17 Real Stuff: x86 Instructions

Unlike RISC this is a CISC (Complex) instruction set and designed to reduce the number of instructions executed by a program.  This can cause instructions to be slower.  This may be due to slower clocks or requiring more clock cycles for simpler tasks.

• Evolution of the Intel x86
• x86 Registers and Data Addressing Modes
  • Instructions must have one operand to serve as source and destination
  • Unlike MIPS/ARM one of the operands can be in memory
  • 
  • Not all general purpose registers can be used for everything for example ESP and EBP have special purposes
• x86 Integer Operations
  • Byte: 8 bits, Word: 16 bits, Double Word: 32 bits, Quad Word: 64 bits
  • 4 Major classes of instructions
    • Data movement instructions (mov, push, pop)
    • Arithmetic and logic (test, integer, decimal ops)
    • Control flow (conditional branches, unconditional jumps, calls returns)
      • x86 uses condition codes or flags like ARMv7
      • Condition codes are set as a side effect of an operation
    • String instructions including string move and string compare
      • Not used most of the time often slower than software equivalent
• x86 Instruction Encoding
  • Complex encoding of instructions with many different instruction formats
    • Length vary from 1 byte w/o operands and up to 15 bytes
  • Opcode byte usually contains a bit saying whether operand is 8 or 32 bits
    • Sometimes opcode may include addressing mode and register (often register=register op immediate)
  • A postbyte or other opcode byte may contain addressing information
    • Labeled as: mod, reg, r/m
    • Used for many instructions that address memory
      • Base plus scaled index mode
  • 
• x86 Conclusion
  • x86 makes up for complexity and hard to build stuff for by large market share
  • Also the most frequently used x86 architectural components are not too difficult to implement
  • AMD and Intel have been rapidly improving performance of integer programs

2.18 Real Stuff: ARMv8 (64-bit Instructions)

• 64 bit upgrade in x86 was essentially just “cosmetic changes” to make registers 64 bits wide
• ARMv8 did a complete overhaul (similar to MIPS)
• See textbook for a full list of stuff